Title :
Low Energy Mapping Techniques under Reliability and Bandwidth Constraints
Author :
Masi, Marina ; Mineo, Andrea ; Palesi, Maurizio ; Ascia, Giuseppe ; Catania, Vincenzo
Author_Institution :
Univ. of Catania, Catania, Italy
Abstract :
The energy consumed by the links of a Network-on-Chip (NoC) accounts for a significant fraction of the overall energy budget in a multi/many-core system. Reducing voltage of the links allows to save energy but at the cost of an increase of the bit error rate (BER). Since different communications might have different reliability (i.e., BER) requirements, in this paper we present a new mapping technique aimed at optimising the static allocation of the tasks into the nodes of the NoC and determining the optimal link voltage swing for minimising the energy consumption under bandwidth and reliability constraints.
Keywords :
energy conservation; multiprocessing systems; network-on-chip; power aware computing; BER; NoC; bandwidth constraints; bit error rate; energy budget; energy consumption; link voltage swing; low energy mapping techniques; many-core system; multicore system; network-on-chip; reliability constraints; Bandwidth; Bit error rate; Energy consumption; Receivers; Reliability; Switches; System-on-chip; Link power reduction; Low power; Network on Chip; mapping;
Conference_Titel :
High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing (HPCC_EUC), 2013 IEEE 10th International Conference on
Conference_Location :
Zhangjiajie
DOI :
10.1109/HPCC.and.EUC.2013.300
