DocumentCode
690189
Title
An efficient parallel executing command scheduler for NAND flash storage systems
Author
Wei Yan ; Yu Liu ; Xuguang Wang
Author_Institution
Solid-State Storage Joint Lab., Suzhou Inst. of Nano-Tech & Nano-Bionics, Suzhou, China
fYear
2013
fDate
15-17 Nov. 2013
Firstpage
20
Lastpage
24
Abstract
Flash memory storage device has received tremendous attention due to its superior performances. The command scheduling algorithm between Flash Translation Layer (FTL) and Flash Controller (FC) is a critical part for the system performance. However, conventional first-in-first-out command scheduling scheme may not fully utilize the full bandwidth due to the different timing budgets for NAND flash operations. In this paper, an efficient out-of-order executing command scheduler is proposed to maximize the parallelism of instructions among channels, targets, dies, planes and even pages. The experimental results demonstrate that the bandwidth can be 45.1% to 250% higher for different data patterns as compared to regular scheduling.
Keywords
NAND circuits; flash memories; FC; FTL; NAND flash storage systems; flash controller; flash memory storage device; flash translation layer; out-of-order executing command scheduler; parallel executing command scheduler; Flash memories; IP networks; Iron; Job shop scheduling; Parallel processing; Random access memory; Registers; command scheduler; flash memory; parallel execution; scoreboard; solid state disk;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Information and Emergency Communication (ICEIEC), 2013 IEEE 4th International Conference on
Conference_Location
Beijing
Type
conf
DOI
10.1109/ICEIEC.2013.6835444
Filename
6835444
Link To Document