A low-power FPGA based on self-adaptive multi-voltage control

This paper presents a low-power FPGA that the supply voltage of each logic block autonomously changes to suit their deadlines. Dual-rail coding is used in FPGA datapaths to make data transfer time sensible in each pipeline stage. The deadline of the logic block in each pipeline stage is evaluated by comparing the data transfer time and the pipeline cycle time. When a low supply voltage does not violate the deadline, the supply voltage of the logic block is autonomously switched to the low voltage. This self-adaptive voltage control scheme saves power consumption without deteriorating the circuit performance. Moreover, level converters are unnecessary in the proposed FPGA which has a simple and efficient architecture.