Title :
Design for low current mismatch in the CMOS charge pump
Author :
Miin-Shyue Shiau ; Ching-Hwa Cheng ; Heng-Shou Hsu ; Hong-Chong Wu ; Hsiu-Hua Weng ; Jing-Jhong Hou ; Ruei-Cheng Sun ; Kai-Che Liu ; Guang-Bao Lu ; Don-Gey Liu
Author_Institution :
Dept. of Electron. Eng., Feng Chia Univ., Taichung, Taiwan
Abstract :
In this study, the charge pump (CP) was designed by gain-boosting amplifiers for lower mismatching. In this design two differential amplifiers were employed to reduce the effect of the channel length modulation in the transistors. This circuit was implemented by the 0.18-μm CMOS technology of TSMC at a power supply of 1.8 V. In our study, the measured mismatch was less than 1% for the output from 0.4 to 1.4 V which is very good for PLL applications.
Keywords :
CMOS analogue integrated circuits; differential amplifiers; pumps; CMOS charge pump design; CP design; PLL application; TSMC CMOS technology; channel length modulation; differential amplifier; gain-boosting amplifier; low-current mismatch; size 0.18 mum; transistors; voltage 0.4 V to 1.4 V; voltage 1.8 V; CMOS integrated circuits; Charge pumps; Current measurement; Phase frequency detector; Phase locked loops; Switches; Transistors; charge pump; charge sharing; current mismatch; phase-locked loop;
Conference_Titel :
SoC Design Conference (ISOCC), 2013 International
Conference_Location :
Busan
DOI :
10.1109/ISOCC.2013.6864035
