Title :
Low power, highly linear, low noise amplifier (LNA) for Ultra-Wideband applications
Abstract :
One of the important components of a receiver is the low noise amplifier (LNA). The challenges of LNA design include ability to achieve high gain, low noise figure and better linearity at low power consumption within the required frequency. In this paper, our design is based on Impulse Response (IR) Ultra-Wideband (UWB) transceiver operating at 3.1-4.6GHz. Hence the LNA designed has been optimized for Low noise figure, considerably high gain and better linearity at low power consumption, which make it suitable for implant-able radio application. The process technology used here is 0.25μm CMOS Silanna process.
Keywords :
CMOS analogue integrated circuits; low noise amplifiers; low-power electronics; microwave amplifiers; microwave integrated circuits; radio transceivers; transient response; CMOS Silanna process; IR transceiver; LNA design; UWB transceiver; frequency 3.1 GHz to 4.6 GHz; implantable radio application; impulse response transceiver; low noise amplifier; low power consumption; size 0.25 mum; ultrawideband applications; CMOS integrated circuits; CMOS technology; Gain; Impedance matching; Linearity; Noise; Topology; Low noise amplifier; Ultra Wide-Band; linearity; low power;
Conference_Titel :
SoC Design Conference (ISOCC), 2013 International
Conference_Location :
Busan
DOI :
10.1109/ISOCC.2013.6864046
