Title :
Noise modeling of source inductive degeneration low noise amplifier in 0.18-µm CMOS technology
Author :
Kurniawan, Taufiq Alif ; Wibisono, Gunawan
Author_Institution :
Dept. of Electr. Eng., Univ. Indonesia, Depok, Indonesia
Abstract :
This paper presents a mathematical modeling of noise performance in source inductive degeneration topology which widely used in narrow band amplifier. The proposed model is conducted by utilizing a small-signal MOSFET model to generate the effective transconductance of circuits. The performance of noise figure can be preserved by selecting the device width while preserving a stable bias voltages and maintaining the device length unchanged. Using the mathematical model, a low noise amplifier is designed and obtain the noise figure of 2.5-dB, an remarkable figure of merit among reported LNAs in 0.18-μm CMOS technology.
Keywords :
CMOS analogue integrated circuits; MOSFET circuits; integrated circuit modelling; integrated circuit noise; low noise amplifiers; operational amplifiers; CMOS technology; LNA; device length; device width; effective transconductance generation; figure of merit; mathematical modeling; narrow band amplifier; noise figure; noise figure 2.5 dB; noise modeling; noise performance; size 0.18 mum; small-signal MOSFET model; source inductive degeneration low noise amplifier; source inductive degeneration topology; stable bias voltages; CMOS integrated circuits; Inductors; Mathematical model; Noise; Noise figure; Resistance; Semiconductor device modeling; 0.18-µm CMOS Technology; LNA; RF; noise;
Conference_Titel :
Communication, Networks and Satellite (COMNETSAT), 2013 IEEE International Conference on
Conference_Location :
Yogyakarta
DOI :
10.1109/COMNETSAT.2013.6870852
