Design and analysis for ThruChip design for manufacturing (DFM)

Author

Li-Chung Hsu ; Take, Yasuhiro ; Kosuge, Atsutake ; Hasegawa, So ; Kadamoto, Junichiro ; Kuroda, Tadahiro

Author_Institution

Dept. of Electron. & Electr. Eng., Keio Univ., Yokohama, Japan

fYear

2015

fDate

19-22 Jan. 2015

Firstpage

46

Lastpage

47

Abstract

A 1GB/s ThruChip interface (TCI) test chip for wafer thinning, power mesh, and dummy metal fill impacts are analyzed and evaluated with test chip measurement and field solver simulation. The measurement results show that TCI coil dimension can be sized down as wafer thinning by following D/Z=3 rule. However, the experiment shows 20% power reduction by enlarging TCI coil (D/Z=6). The power mesh lies between TCI coils can dramatically decrease the TCI magnetic pulse strength and hence cause TCI to fail. Dummy metal within TCI coils has no impact on TCI transmission.

Keywords

design for manufacture; three-dimensional integrated circuits; TCI magnetic pulse strength; ThruChip design for manufacturing; ThruChip interface test chip; dummy metal fill impacts; power mesh; wafer thinning; Coils; Couplings; Current measurement; Eddy currents; Metals; Power measurement; Semiconductor device measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific

Conference_Location

Chiba

Print_ISBN

978-1-4799-7790-1

Type

conf

DOI

10.1109/ASPDAC.2015.7058979

Filename

7058979