Hybrid coverage assertions for efficient coverage analysis across simulation and emulation environments

Coverage metrics are commonly used to measure the completeness of the verification test suites. However, in a modern hardware-accelerated environment, coverage may be analyzed across a simulator and an emulator. Hence, neither conventional coverage techniques performed in simulation nor hardware coverage monitors embedded in an emulator can be directly applied. To resolve the above problem, we propose using coverage assertions to detect coverage events across a simulator and an emulator. In addition, an Assertion Operation Graph and graph-based algorithms are proposed to minimize the hardware and performance overheads of coverage assertions. We perform experiments in the hardware-accelerated environment of Xilinx ISE and show an encouraging reduction of coverage assertion overheads.