DocumentCode
69685
Title
Timing Recovery Algorithms and Architectures for 2-D Magnetic Recording Systems
Author
Reddy, Brijesh P. ; Srinivasa, Shayan Garani ; Dahandeh, Shafa
Author_Institution
Dept. of Electron. Syst. Eng., Indian Inst. of Sci., Bangalore, India
Volume
51
Issue
4
fYear
2015
fDate
Apr-15
Firstpage
1
Lastpage
7
Abstract
We investigate the problem of timing recovery for 2-D magnetic recording (TDMR) channels. We develop a timing error model for TDMR channel considering the phase and frequency offsets with noise. We propose a 2-D data-aided phase-locked loop (PLL) architecture for tracking variations in the position and movement of the read head in the down-track and cross-track directions and analyze the convergence of the algorithm under non-separable timing errors. We further develop a 2-D interpolation-based timing recovery scheme that works in conjunction with the 2-D PLL. We quantify the efficiency of our proposed algorithms by simulations over a 2-D magnetic recording channel with timing errors.
Keywords
convergence of numerical methods; interpolation; magnetic heads; magnetic recording noise; synchronisation; 2D data-aided phase-locked loop architecture; 2D interpolation-based timing recovery scheme; 2D magnetic recording channels; cross-track directions; down-track directions; frequency offsets; noise; phase offsets; read head movement; read head position; timing error model; tracking variations; Interpolation; Magnetic heads; Magnetic recording; Mathematical model; Phase locked loops; Servomotors; Timing; 2-D interpolation timing recovery; 2-D phase-locked loop (PLL); timing recovery; timing recovery for 2-D magnetic recording (TDMR);
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/TMAG.2014.2361619
Filename
7110149
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