DocumentCode :
69784
Title :
GeTe Liner Stressor Featuring Phase-Change- Induced Volume Contraction for Strain Engineering of Sub-50-nm p-Channel FinFETs: Simulation and Electrical Characterization
Author :
Ran Cheng ; Yinjie Ding ; Shao-Ming Koh ; Yue Yang ; Fan Bai ; Bin Liu ; Yee-Chia Yeo
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore
Volume :
61
Issue :
8
fYear :
2014
fDate :
Aug. 2014
Firstpage :
2647
Lastpage :
2655
Abstract :
We report the experimental demonstration of strained p-channel FinFETs featuring a GeTe liner stressor that exhibits very large volume contraction (~10%) during phase change. Conformally grown GeTe liner was formed on FinFETs with sub-50-nm gate length LG. When the GeTe liner changes phase from amorphous (α-GeTe) to polycrystalline (c-GeTe) state, it contracts and imparts very high compressive channel stress. A finite element method simulation was performed to study the channel stress in FinFETs, followed by a k · p calculation of Si valence band structure with the simulated strain tensors. The effective mass of the topmost valence band is reduced and the band dispersion between heavy-hole and light-hole sub-bands at Γ point increases with the effect of the strain induced by the GeTe liner. Significant drive current IDsat enhancement of 96% was observed for FinFETs with 50-nm c-GeTe liner stressor over the control devices. IDsat enhancement increases as LG reduces, showing good scalability of the GeTe liner stressor for possible application in future technology nodes.
Keywords :
MOSFET; crystallisation; deformation; finite element analysis; germanium compounds; stress effects; valence bands; GeTe; amorphous-polycrystalline state; compressive channel stress; drive current enhancement; electrical characterization; finite element method; liner stressor; p-channel FinFET; phase change induced volume contraction; strain engineering; strain tensor; valence band structure; Annealing; FinFETs; Logic gates; Silicon; Solid modeling; Strain; Stress; 3-D stress simulation; GeTe liner; multigate FET; phase change; strain; valence band structure calculation; valence band structure calculation.;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2014.2328667
Filename :
6843952
Link To Document :
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