DocumentCode :
69788
Title :
Back-Gate Effect on R_{math\\rm {{math\\rm{{\\scriptscriptstyle ON}},sp}}} and BV for Thin Layer SOI Field p-Channel LDMOS
Author :
Xin Zhou ; Ming Qiao ; Yitao He ; Zhuo Wang ; Zhaoji Li ; Bo Zhang
Author_Institution :
State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Volume :
62
Issue :
4
fYear :
2015
fDate :
Apr-15
Firstpage :
1098
Lastpage :
1104
Abstract :
The Backgate (BG) effect on specific ON-resistance ( R_{{{math\\rm{{\\scriptscriptstyle ON}},\\rm sp}}}) and breakdown voltage (BV) for the thin layer Silicon On Insulator (SOI) field p-channel lateral diffusion MOS (pLDMOS) are investigated in this paper. BG-induced dual conduction mode for the thin layer SOI field pLDMOS is revealed, which includes drift and accumulation conduction. Hole accumulation layer induced by BG voltage ( V_{\\rm BG}) provides extra charges, resulting in a R_{{{math\\rm{{\\scriptscriptstyle ON}},{\\rm sp}}}} reduction. An expression of equivalent R_{{{math\\rm{{\\scriptscriptstyle ON}},{\\rm sp}}}} is given to describe the dependence of R_{{{math\\rm{{\\scriptscriptstyle ON}},{\\rm sp}}}} on V_{\\rm BG} . Simultaneously, V_{\\rm BG} impacts strongly on BV, inducing three breakdown mechanisms: surface breakdown, bulk breakdown, and punchthrough breakdown. For surface breakdown, a positive linear dependence of BVs on V_{\\rm BG} is given with consideration to multiple _{_{}} field plates (MFP). BV of −366 V and R_{{{math\\rm{{\\scriptscriptstyle ON}},{\\rm sp}}}} of 7.5~\\Omega \\cdot mm ^{2}$ </tex- </\\inl\\i\\ne-for\\mula> for \\the th\\in layer SOI \\field pLDMOS are a\\chi eved \\experimenta\\lly at <\\inl\\i\\ne-for\\mula> $V_{\\rm BG} = -200 V.
Keywords :
MOSFET; semiconductor device breakdown; silicon-on-insulator; back gate effect; breakdown mechanisms; breakdown voltage; bulk breakdown; field p-channel lateral diffusion MOS; on-resistance; punch-through breakdown; silicon-on-insulator; surface breakdown; thin layer SOI field p-channel LDMOS; Current density; Doping; Electric breakdown; Junctions; Resistance; Silicon-on-insulator; Voltage measurement; Back-gate (BG) effect; breakdown mechanism; dual conduction (DC) mode; specific ON-resistance ( (R_{{mathrm{scriptscriptstyle ON}},{rm sp}}) ); specific ON-resistance (RON,sp); thin layer SOI field p-channel lateral diffusion MOS (pLDMOS); thin layer SOI field p-channel lateral diffusion MOS (pLDMOS).;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2015.2399504
Filename :
7042924
Link To Document :
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