Debug Challenges for UTMI Low Pin Interface (ULPI) PHY in Nano Scale Technology

Real world communication are analog in nature whereas data processing happens in digital domain. This leads to generation of Mixed Signal design. With reference to USB, ULPI PHY serves as mixed design component that is present in most of today´s gadgets. Because of its high speed and complexity, there is a need to check the individual design features of the ULPI PHY IP, which are hard to validate when the embedded in a System on Chip. The limitation comes from the fact that only a limited number of signals can be probed at SOC level. This paper describes the debug challenges and techniques used to validate these features before the IP goes into SOC.