DocumentCode :
699194
Title :
On the design and FPGA implementation of real-time scanned-array 2D frequency-planar beam filters
Author :
Madanayake, Arjuna ; Bruton, Len
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
fYear :
2004
fDate :
6-10 Sept. 2004
Firstpage :
2011
Lastpage :
2014
Abstract :
We propose a field programmable gate array (FPGA) circuit-based 2D IIR single-chip spatio-temporal filter having low hardware complexity for the purpose of processing 2D scanned-array sampled signals. The filter is suitable for the selective real-time filtering of broadband spatio-temporal plane waves by employing low-order highly-selective 2D frequency-planar beam-shaped filter passbands. The design and hardware co-simulation is described for a Xilinx FPGA chip. Employing a linear array of N sensors, temporal sampling rates up to fAS/N MHz per sensor are feasible using one A/D converter and a FPGA chip, clocked at fAS MHz. A directional audio example is given for CD quality propagating sound waves.
Keywords :
IIR filters; analogue-digital conversion; band-pass filters; field programmable gate arrays; 2D scanned-array sampled signals; A-D converter; CD quality propagating sound waves; FPGA circuit-based 2D IIR single-chip spatio-temporal filter; FPGA implementation; Xilinx FPGA chip; broadband spatio-temporal plane; directional audio example; field programmable gate array; hardware co-simulation; hardware complexity; low-order highly-selective 2D frequency-planar beam-shaped filter passbands; real-time scanned-array 2D frequency-planar beam filters; selective real-time filtering; sensor linear array; temporal sampling; Abstracts; IIR filters; Nickel; Pipelines; Very large scale integration; Wireless sensor networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Conference, 2004 12th European
Conference_Location :
Vienna
Print_ISBN :
978-320-0001-65-7
Type :
conf
Filename :
7079724
Link To Document :
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