• DocumentCode
    700173
  • Title

    A lexical-tree division-based approach to parallelizing a cross-word speech decoder for multi-core processors

  • Author

    Parihar, Naveen ; Hansen, Eric A.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Mississippi State Univ., Starkville, MS, USA
  • fYear
    2008
  • fDate
    25-29 Aug. 2008
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    We present a novel approach to parallelizing a lexical-tree based LVCSR decoding algorithm for multi-core desktop processors. The approach distributes the search space among the cores by dividing the lexical tree in a way that minimizes communication between cores. Synchronization and load balancing schemes for this approach are described. The parallel algorithm is benchmarked on a 5k-word Wall Street Journal task. The context-dependent triphone model baseline system achieves a WER of 8.4%. The algorithm is shown to achieve a speedup of 1.63 on an Intel Core 2 Duo processor, with an average CPU utilization of 86%. The results also show that increasing the width of pruning schemes improves the parallel speedup.
  • Keywords
    multiprocessing systems; parallel algorithms; speech codecs; trees (mathematics); CPU utilization; Intel core 2 duo processor; LVCSR decoding algorithm; context-dependent triphone model; cross-word speech decoder; lexical-tree division-based approach; load balancing scheme; multicore desktop processor; parallel algorithm; synchronization; Computational modeling; Decoding; Hidden Markov models; Instruction sets; Signal processing algorithms; Synchronization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Conference, 2008 16th European
  • Conference_Location
    Lausanne
  • ISSN
    2219-5491
  • Type

    conf

  • Filename
    7080705