Title :
Fast obstacle-avoiding octilinear steiner minimal tree construction algorithm for VLSI design
Author :
Xing Huang ; Wenzhong Guo ; Guolong Chen
Author_Institution :
Coll. of Math. & Comput. Sci., Fuzhou Univ., Fuzhou, China
Abstract :
With advance in manufacturing technology, 45° and 135° diagonal segments can be permitted in an octilinear routing model. In this article, we present a heuristic algorithm to solve obstacle-avoiding octilinear Steiner minimal tree (OAOSMT) construction problem. We first construct an obstacle-free Euclidean minimal spanning tree (OFEMST). Then two lookup tables about OFEMST´s edge are generated, which can provide fast information inquiry for subsequent steps. Next, an obstacle-avoiding strategy is proposed to convert OFEMST into an obstacle-avoiding octilinear Steiner tree (OAOST). Finally, we design an excellent refinement technique, which can further reduce the wirelengh. Experiments show that both wirelengh and runtime of our algorithm are the best compared to the previous algorithms.
Keywords :
VLSI; integrated circuit design; network routing; table lookup; trees (mathematics); OAOSMT construction problem; OFEMST edge; VLSI design; fast obstacle-avoiding octilinear Steiner minimal tree construction algorithm; heuristic algorithm; lookup tables; manufacturing technology; obstacle-free Euclidean minimal spanning tree; octilinear routing model; refinement technique; Algorithm design and analysis; Open systems; Pins; Routing; Runtime; Steiner trees; Very large scale integration; VLSI routing; obstacle-avoiding; octilinear Steiner tree;
Conference_Titel :
Quality Electronic Design (ISQED), 2015 16th International Symposium on
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4799-7580-8
DOI :
10.1109/ISQED.2015.7085396