• DocumentCode
    702309
  • Title

    Automatic die placement and flexible I/O assignment in 2.5D IC design

  • Author

    Seemuth, Daniel P. ; Davoodi, Azadeh ; Morrow, Katherine

  • Author_Institution
    Univ. of Wisconsin - Madison, Madison, WI, USA
  • fYear
    2015
  • fDate
    2-4 March 2015
  • Firstpage
    524
  • Lastpage
    527
  • Abstract
    This paper presents a problem formulation and procedure for design automation of 2.5D interposer-based multi-die ICs. Our approach is designed for (but not limited to) 2.5D ICs that contain one or more dies with flexible I/Os - such as FPGA dies. Given a set of dies, inter-die connections, I/O standard(s) for the connections, and a set of valid die pins for the connections, we simultaneously place dies on an interposer, assign pins to each inter-die connection, and assign specific voltages to I/O bank power supplies of the FPGA dies to produce a valid layout and pin assignments for the design. To our knowledge, this is the first formulation and methodology to consider flexible I/Os in 2.5D design automation. We demonstrate the effectiveness of our procedure through a variety of example 2.5D designs containing different types of interconnected dies.
  • Keywords
    electronic design automation; field programmable gate arrays; integrated circuit design; integrated circuit interconnections; 2.5D IC design; 2.5D interposer-based multidie IC; FPGA; automatic die placement; design automation; flexible I/O assignment; interdie connections; Field programmable gate arrays; Layout; Pins; Power supplies; Standards; Three-dimensional displays; 2.5D; FPGA; flexible I/Os; interposer; placement; simulated annealing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ISQED), 2015 16th International Symposium on
  • Conference_Location
    Santa Clara, CA
  • Print_ISBN
    978-1-4799-7580-8
  • Type

    conf

  • DOI
    10.1109/ISQED.2015.7085480
  • Filename
    7085480