Design and analysis of 10 port router for network on chip (NoC)

Author

Malipatil, Somashekhar ; Rekha, S.

Author_Institution

APPA Inst. of Eng. & Technol., Gulbarga, India

fYear

2015

fDate

8-10 Jan. 2015

Firstpage

1

Lastpage

3

Abstract

Network on chip is an emerging technology which provides data reliability and high speed with less power consumption. With the technological advancements a large number of devices can be integrated into a single chip. So the communication between these devices becomes vital. The network on chip (NoC) router is used for such communication. This paper focuses on the design analysis of 10 port router. The delay (2.571ns) and power (80.98mW) is minimized by using crossbar switch. The proposed architecture of 10 port router is simulated and synthesized in Xilinx ISE 14.4 software.

Keywords

integrated circuit design; integrated circuit reliability; network-on-chip; NoC; Xilinx ISE 14.4 software; crossbar switch; data reliability; network on chip; port router; power 80.98 mW; power consumption; time 2.571 ns; Computer architecture; Delays; Integrated circuit interconnections; Ports (Computers); Switches; System-on-chip; Three-dimensional displays; 2D Mesh; 3D Mesh; Crossbar switch; Network on Chip (NoC); Router; Verilog; Xilinx ISE 14.4;

fLanguage

English

Publisher

ieee

Conference_Titel

Pervasive Computing (ICPC), 2015 International Conference on

Conference_Location

Pune

Type

conf

DOI

10.1109/PERVASIVE.2015.7087013

Filename

7087013