Low power full adder circuit using Gate Diffusion Input (GDI) MUX

Power consumption plays a major role in high performance, portable devices which are greatly in demand currently. Full adders are the basic building blocks of the arithmetic unit and VLSI applications such as digital signal processing, microprocessor, which are commonly used in these portable devices. Therefore, reducing the power consumption in fuller adder circuits, results in overall power savings of the full circuit. This paper presents a full adder circuit based on multiplexers, which are implemented using different techniques such as pass transistor, transmission gate and Gate Diffusion Input (GDI). The adder circuits implemented, simulated and comparison results are presented. Cadence tool set using 180nm technology is used to obtain the results.