Title :
VLSI implementation and complexity comparison of residue generators modulo 3
Author :
Piestrak, Stanislaw J. ; Pedron, Fabrice ; Sentieys, Olivier
Author_Institution :
LASTI, Univ. de Rennes 1, Lannion, France
Abstract :
A generator modulo 3 (mod 3) is a circuit that generates a residue mod 3 from a binary vector. It is an essential circuit used to construct the encoding and checking circuitry for arithmetic error detecting codes, such as residue codes mod 3 and the 3N code, as well as some residue number system hardware. In this paper, we compare speed and area of varius VLSI implementations of 16-input generators modulo 3. It is shown that the generator built of full-adders consumes the least area. On the other hand, the generator built as a tree of special 4-input modules is twice as fast, although at the cost of increasing the area by a factor of 1.7.
Keywords :
VLSI; adders; residue number systems; VLSI implementations; binary vector; complexity comparison; full-adders; residue generators modulo 3; Adders; Computer architecture; Generators; Layout; Logic gates; Sorting; Very large scale integration;
Conference_Titel :
Signal Processing Conference (EUSIPCO 1998), 9th European
Conference_Location :
Rhodes
Print_ISBN :
978-960-7620-06-4