Title :
An online thermal-constrained task scheduler for 3D multi-core processors
Author :
Chien-Hui Liao ; Wen, Charles H-P ; Chakrabarty, Krishnendu
Author_Institution :
Inst. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
Hotspots occur frequently in 3D multi-core processors (3D-MCPs) and they can adversely impact system reliability and lifetime. Moreover, frequent occurrences of hotspots lead to more dynamic voltage and frequency scaling (DVFS), resulting in degraded throughput. Therefore, a new thermal-constrained task scheduler based on thermal-pattern-aware voltage assignment (TPAVA) is proposed in this paper. By analyzing temperature profiles of different voltage assignments, TPAVA pre-emptively assigns different operating-voltage levels to cores for reducing temperature increase in 3D-MCPs. Moreover, the proposed task scheduler integrates a vertical-grouping voltage scaling (VGVS) strategy that considers thermal correlation in 3D-MCPs. Experimental results show that, compared with two previous methods, the proposed task scheduler can respectively lower hotspot occurrences by 47.13% and 53.91%, and improve throughput by 6.50% and 32.06%. As a result, TPAVA and VGVS are effectively for reducing occurrences of hotspots and optimizing throughput for 3D-MCPs under thermal constraints.
Keywords :
multiprocessing systems; power aware computing; processor scheduling; 3D multicore processors; 3D-MCP; TPAVA; VGVS strategy; dynamic voltage and frequency scaling; hotspots; lifetime; online thermal-constrained task scheduler; operating-voltage levels; system reliability; temperature profile analysis; thermal correlation; thermal-pattern-aware voltage assignment; vertical-grouping voltage scaling; Heat sinks; Mathematical model; Power demand; Resource management; Three-dimensional displays; Throughput; Voltage control;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
Conference_Location :
Grenoble
Print_ISBN :
978-3-9815-3704-8