• DocumentCode
    703988
  • Title

    Efficient bit error rate estimation for high-speed link by Bayesian model fusion

  • Author

    Chenlei Fang ; Qicheng Huang ; Fan Yang ; Xuan Zeng ; Xin Li ; Chenjie Gu

  • Author_Institution
    Microelectron. Dept., Fudan Univ., Shanghai, China
  • fYear
    2015
  • fDate
    9-13 March 2015
  • Firstpage
    1024
  • Lastpage
    1029
  • Abstract
    High-speed I/O link is an important component in computer systems, and estimating its bit error rate (BER) is a critical task to guarantee its performance. In this paper, we propose an efficient method to estimate BER by Bayesian Model Fusion. Its key idea is to borrow conventional extrapolated BER value as prior knowledge, and combine it with additional measurement data to “calibrate” the BER value. This method can be viewed as an application of Bayesian Model Fusion (BMF) technique. We further propose some novel methodologies to make BMF applicable in the BER estimation case. In this way, we can sufficiently decrease the number of bits needed to estimate BER value. Several experiments demonstrate that our proposed method achieves up to 8× speed-up over direct estimation method.
  • Keywords
    Bayes methods; error statistics; extrapolation; input-output programs; sensor fusion; BER extrapolation value; BER value calibration; Bayesian model fusion; efficient bit error rate estimation; high-speed I-O link; measurement data; Bayes methods; Bit error rate; Extrapolation; Maximum likelihood estimation; Time measurement; Voltage measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
  • Conference_Location
    Grenoble
  • Print_ISBN
    978-3-9815-3704-8
  • Type

    conf

  • Filename
    7092540