Title :
A ultra-low-power FPGA based on monolithically integrated RRAMs
Author :
Gaillardon, Pierre-Emmanuel ; Xifan Tang ; Sandrini, Jury ; Thammasack, Maxime ; Omam, Somayyeh Rahimian ; Sacchetto, Davide ; Leblebici, Yusuf ; De Micheli, Giovanni
Author_Institution :
Swiss Fed. Inst. of Technol., Lausanne, Switzerland
Abstract :
Field Programmable Gate Arrays (FPGAs) rely heavily on complex routing architectures. The routing structures use programmable switches and account for a significant share in the total area, delay and power consumption numbers. With the ability of being monolithically integrated with CMOS chips, Resistive Random Access Memories (RRAMs) enable high-performance routing architectures through the replacement of Static Random Access Memory (SRAM)-based programming switches. Exploiting the very low on-resistance state achievable by RRAMs as well as the improved tolerance to power supply reduction, RRAM-based routing multiplexers can be used to significantly reduce the power consumption of FPGA systems with no performance compromises. By evaluating the opportunities of ultra-low-power RRAM-based FPGAs at the system level, we see an improvement of 12%, 26% and 81% in area, delay and power consumption at a mature technology node.
Keywords :
CMOS memory circuits; SRAM chips; field programmable gate arrays; low-power electronics; monolithic integrated circuits; network routing; resistive RAM; switches; CMOS chips; FPGA system power consumption; RRAM-based routing multiplexers; SRAM-based programming switches; complex routing architectures; field programmable gate arrays; high-performance routing architectures; monolithically integrated RRAM; power consumption numbers; power supply reduction; programmable switches; resistive random access memories; routing structures; static random access memory-based programming switches; total area; total delay; ultralow-power RRAM-based FPGAs; CMOS integrated circuits; Delays; Field programmable gate arrays; Multiplexing; Random access memory; Routing; Table lookup;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
Conference_Location :
Grenoble
Print_ISBN :
978-3-9815-3704-8