DocumentCode :
704178
Title :
Revealing Potential Performance Improvements by Utilizing Hybrid Work-Sharing for Resource-Intensive Seismic Applications
Author :
Siegl, Patrick ; Buchty, Rainer ; Berekovic, Mladen
Author_Institution :
Dept. of Chip Design for Embedded Comput. (C3E), Tech. Univ. Carolo-Wilhelmina zu Braunschweig, Germany
fYear :
2015
fDate :
4-6 March 2015
Firstpage :
659
Lastpage :
663
Abstract :
Heterogeneous system architectures are becoming more and more of a commodity in the scientific community. While it remains challenging to fully exploit such architectures, the benefits in performance and hybrid speed-up, by using a host processor and accelerators in parallel in a non-monolithic matter, are significant. Hereby, the energy efficiency is becoming an increasingly critical challenge for future high-performance computing (HPC) systems, which do want to exceed the Exascale barrier with several competing architecture concepts ranging from high-performance CPUs, combined with GPUs acting as floating-point accelerators, to computationally weak CPUs, paired with dedicated and highly-perform ant FPGA-based accelerators. In this paper, we realize and evaluate a hybrid computing approach based on a two-dimensional seismic streaming algorithm with several heterogeneous system architectures, including conventional HPC approaches based on powerful CPUs and GPUs. Furthermore, we elaborate the effort on an embedded system platform claiming to be a "mini supercomputer" [1]. Several CPU and accelerator combinations are utilized in a manual work-sharing manner with the aim of achieving significant performance speed-ups and a detailed energy-efficiency study. Based on roofline models and experimental evaluations, the paper provides an insight into the fact that hybrid computing is mostly unconditionally beneficial for balanced systems regarding the performance as well as the energy efficiency, aiding the programmer in the decision whether or not costly, manually tuned, homogeneous implementations are worthwhile.
Keywords :
computer architecture; field programmable gate arrays; floating point arithmetic; hybrid computer programming; multiprocessing systems; parallel processing; Exascale barrier; FPGA-based accelerators; HPC approach; experimental evaluations; floating-point accelerators; heterogeneous system architectures; high-performance computing system; hybrid computing approach; hybrid work-sharing; resource-intensive seismic applications; roofline models; two-dimensional seismic streaming algorithm; Benchmark testing; Computational modeling; Computer architecture; Graphics processing units; Instruction sets; Partitioning algorithms; Performance evaluation; (embedded) hybrid worksharing; multi GPU processing; narrow stencil computing; performance evaluation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel, Distributed and Network-Based Processing (PDP), 2015 23rd Euromicro International Conference on
Conference_Location :
Turku
ISSN :
1066-6192
Type :
conf
DOI :
10.1109/PDP.2015.28
Filename :
7092789
Link To Document :
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