Quantization mode opportunities in fixed-point system design

Finding the optimal tradeoff in terms of area, delay and energy consumption which satisfies a given DSP functionality is the main objective of hardware and embedded software designers. Signal bit-widths importantly impact these metrics. Signals with less bits also require operators with smaller area, shorter critical path and lower energy consumption. In some applications, these minimal signal bit-widths can vary significantly depending on the quantization mode. As a result, a rounding-based implementation may require smaller minimal bit-widths than a truncation-based one and potentially lead to cheaper system implementations. The optimal quantization mode combination (QMC) can reduce significantly the implementation cost compared to a traditional implementation based on the truncation mode. This has been demonstrated on different representative kernels. For example, in the case of a LMS filter, the optimal QMC can reduce up to 46% of the area of an implementation based on truncation.