• DocumentCode
    70529
  • Title

    Capacitor voltage balancing of a three-phase neutralpoint clamped bi-directional rectifier using optimised switching sequences

  • Author

    Bhat, Abdul Hamid ; Langer, Nitin ; Sharma, Divya ; Agarwal, Prabhakar

  • Author_Institution
    Department of Electrical Engineering, National Institute of Technology Srinagar, Kashmir, India
  • Volume
    6
  • Issue
    6
  • fYear
    2013
  • fDate
    Jul-13
  • Firstpage
    1209
  • Lastpage
    1219
  • Abstract
    In this study, a modulation strategy is presented using minimum number of switching transitions of optimised switching sequences for balancing of DC-bus capacitor voltages of a three-phase neutral-point clamped bi-directional converter. This new approach is derived from the fact that in front end AC–DC converters, the location of supply voltage vector and reference current vector (magnitude and lag angle) vary depending upon the amount of reactive power compensation and the load current to be supplied by converter. Accordingly, the effect of small and medium vectors (using space vector pulse-width modulation) for same switching state varies in each sector and its regions resulting in DC-bus capacitor voltage unbalancing. This observation along with the detailed analysis of current pattern for both the capacitors within each sector and its regions and its effect on neutral-point voltage deviation forms the basis of proposed approach of maintaining optimised space vector sequences and changing the number of sampling periods within each sector and its regions, thus resulting in DC-bus capacitor voltage balancing. As a result, modified reference current vector spends different amount of time in alternate sectors (moves faster and slower in alternate sectors) but total time for one complete cycle is same as actual current vector. The converter exhibits excellent performance in terms of other critical parameters like unity input power factor, low input current THD, minimum switching losses, reduced ripple factor of the regulated DC output voltage and particularly, the neutral-point voltage deviation under dynamic load conditions both for rectification and inversion modes of operation.
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IET
  • Publisher
    iet
  • ISSN
    1755-4535
  • Type

    jour

  • DOI
    10.1049/iet-pel.2012.0395
  • Filename
    6574833