DocumentCode
707544
Title
Power estimation of modified booth recoder for efficient add-multiply operator
Author
Shruthilaya, K. ; Vinoth, M.
Author_Institution
Dept. of ECE, Chettinad Coll. of Eng. & Technol., Karur, India
fYear
2015
fDate
11-13 March 2015
Firstpage
1684
Lastpage
1689
Abstract
To improve the performance and speed of Digital signal processing operations such as FFT (Fast Fourier Transform), DCT (Discrete Cosine Transform) and FIR (Finite Impulse Response). We can implement the arithmetic operations in a fused manner. By direct recoding of the sum of two numbers in Modified Booth, the Add-Multiply operator have been fused together to reduce the power consumption, hardware complexity and delay. The implementation of different recoding schemes and estimation of the power and delay were done using Microwind Tool.
Keywords
computational complexity; delay estimation; digital arithmetic; digital signal processing chips; matrix multiplication; Microwind tool; add-multiply operator; arithmetic operation; delay estimation; digital signal processing; hardware complexity; power consumption reduction; power estimation; sum to modified Booth recoding technique; Adders; Algorithm design and analysis; Delays; Digital signal processing; Encoding; Estimation; Power demand; Add-Multiply operation and Sum to Modified Booth(S-MB) recoding; Modified Booth recoding;
fLanguage
English
Publisher
ieee
Conference_Titel
Computing for Sustainable Global Development (INDIACom), 2015 2nd International Conference on
Conference_Location
New Delhi
Print_ISBN
978-9-3805-4415-1
Type
conf
Filename
7100534
Link To Document