DocumentCode :
707951
Title :
CMOS amplifier with self-correction offset for SerDes applications
Author :
Bracamontes-Salazar, Rigoberto ; Juarez-Hernandez, Esdras ; Lobato-Lopez, Federico ; Martinez-Guerrero, Esteban
Author_Institution :
Freescale Semicond., Guadalajara, Mexico
fYear :
2015
fDate :
25-27 March 2015
Firstpage :
1
Lastpage :
4
Abstract :
In Serializer/Deserializer (SerDes) systems usually there is a mismatch between the devices used in the circuitry handling the two complimentary signals and the analog front-end equalizer (AFE) circuit. This introduces an unknown and relatively steady offset voltage into the differential signals, this offset affects the noise margin of the system. A design of self-correction offset amplifier based on a continuous-time closed loop is proposed for minimizing input voltage offset coming from different sources in the range from - 30 mV to + 30 mV. Simulation results showed offset correction at the amplifier output which allows proper operation in SerDes systems. The amplifier was designed in AMI 0.5 μm CMOS technology, for 6 mW of power consumption and 3.0 V supply.
Keywords :
CMOS integrated circuits; closed loop systems; continuous time systems; differential amplifiers; equalisers; AFE circuit; AMI 0.5 μm CMOS technology; CMOS amplifier; SerDes systems; analog front-end equalizer circuit; complimentary signals; continuous-time closed loop; differential signals; noise margin; offset correction; offset voltage; power 6 mW; self-correction offset amplifier; serializer-deserializer systems; size 0.5 mum; voltage -30 mV to 30 mV; voltage 2.0 V; MOS integrated circuits; analog circuits; circuit simulation; differential amplifiers; low-pass filters; offsetcorrection;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (LATS), 2015 16th Latin-American
Conference_Location :
Puerto Vallarta
Type :
conf
DOI :
10.1109/LATW.2015.7102409
Filename :
7102409
Link To Document :
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