Title :
Particle Swarm optimization in designing of high slew rate and improved resolution CMOS Winner-Take-All (WTA) circuit suitable for attention shift
Author :
Paul, P.K. ; Baishnab, K.L. ; Laskar, Naushad Manzoor ; Talukdar, F.A.
Author_Institution :
Nat. Inst. of Technol., Silchar, India
Abstract :
In emulating biological feature of attention shift, a high slew rate CMOS Winner-Take-Circuit is designed. Particle Swarm optimization has been used in order to optimized multi-objective circuit parameters. Simulation is carried out in MATLAB and CADENCE software. Simulation results demonstrate circuit possesses high slew rate (around 400V/μs) and facilitate attention shift.
Keywords :
CMOS analogue integrated circuits; VLSI; circuit optimisation; circuit simulation; integrated circuit design; integrated circuit modelling; mathematics computing; particle swarm optimisation; CADENCE software; CMOS winner-take-all circuit; MATLAB; particle swarm optimization; slew rate; Integrated circuit modeling; Load modeling; Rails; Transistors; Very large scale integration; Visualization; Cadence; Circuit Design; Optimization; PSO; Slew Rate;
Conference_Titel :
Information and Communication Systems (ICICS), 2015 6th International Conference on
Conference_Location :
Amman
DOI :
10.1109/IACS.2015.7103201
