DocumentCode
708272
Title
Effectively paralleling gallium nitride transistors for high current and high frequency applications
Author
Reusch, David ; Strydom, Johan
Author_Institution
Efficient Power Conversion Corp., El Segundo, CA, USA
fYear
2015
fDate
15-19 March 2015
Firstpage
745
Lastpage
751
Abstract
Gallium nitride (GaN) based power devices are rapidly being adopted due to their ability to operate at frequencies and switching speeds beyond the capability of silicon (Si) power MOSFETs. In this paper, we will discuss paralleling high speed GaN transistors in applications requiring higher output current. This work will discuss the impact of in-circuit parasitics on performance and propose printed circuit board (PCB) layout methods to improve parallel performance of high speed GaN transistors. Four parallel half bridges in an optimized layout operated as a 48 V to 12 V, 480 W, 300 kHz, 40 A single phase buck converter achieving efficiencies above 96.5% from 35% to 100% load will be demonstrated. Also in this paper, we will discuss the latest eGaN® FET developments including the fourth generation devices designed for higher current handling capability.
Keywords
gallium compounds; power MOSFET; power convertors; FET developments; GaN; PCB layout methods; gallium nitride transistor paralleling; higher current handling capability; in-circuit parasitics; printed circuit board; single phase buck converter; Frequency locked loops; Gallium nitride; Inductance; Layout; Performance evaluation; Silicon; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference and Exposition (APEC), 2015 IEEE
Conference_Location
Charlotte, NC
Type
conf
DOI
10.1109/APEC.2015.7104433
Filename
7104433
Link To Document