Title :
A 2.3-MW Medium-voltage, three-level wind energy inverter applying a unique bus structure and 4.5-kV Si/SiC hybrid isolated power modules
Author :
Erdman, William L. ; Keller, Jonathan ; Grider, David ; VanBrunt, Edward
Author_Institution :
Cinch LLC, Moraga, CA, USA
Abstract :
A high-efficiency, 2.3-MW, medium-voltage, three-level inverter utilizing 4.5-kV Si/SiC (silicon carbide) hybrid modules for wind energy applications is discussed. The inverter addresses recent trends in siting the inverter within the base of multimegawatt turbine towers. A simplified split, three-layer laminated bus structure that maintains low parasitic inductances is introduced along with a low-voltage, high-current test method for determining these inductances. Feed-thru bushings, edge fill methods, and other design features of the laminated bus structure provide voltage isolation that is consistent with the 10.4-kV module isolation levels. Inverter efficiency improvement is a result of the (essential) elimination of the reverse recovery charge present in 4.5-kV Si PIN diodes, which can produce a significant reduction in diode turn-off losses as well as insulated-gate bipolar transistor (IGBT) turn-on losses. The hybrid modules are supplied in industry-standard 140 mm × 130 mm and 190 mm × 130 mm packages to demonstrate direct module substitution into existing inverter designs. A focus on laminated bus/capacitor-bank/module subassembly level switching performance is presented.
Keywords :
assembling; bushings; elemental semiconductors; insulated gate bipolar transistors; invertors; laminations; p-i-n diodes; poles and towers; power semiconductor diodes; semiconductor device packaging; semiconductor device testing; silicon; silicon compounds; wide band gap semiconductors; wind power plants; wind turbines; IGBT; PIN diode; Si-SiC; diode turn-off loss; edge fill method; feed-thru bushing; hybrid isolated power module; insulated-gate bipolar transistor; laminated bus-capacitor-bank-module subassembly level switching performance; low-voltage high-current test method; medium-voltage three-level wind energy inverter; multimegawatt turbine tower; parasitic inductance; power 2.3 MW; recovery charge; simplified split three-layer laminated bus structure; turn-on loss; voltage 10.4 kV; voltage 4.5 kV; voltage isolation; Insulated gate bipolar transistors; Inverters; Layout; Schottky diodes; Silicon; Silicon carbide; Wind turbines; SiC; Wind turbine; barrier diode; efficiency; laminated bus; logarithmic decrement method; medium voltage; parasitic inductances; silicon carbide; three-level inverter; wind energy;
Conference_Titel :
Applied Power Electronics Conference and Exposition (APEC), 2015 IEEE
Conference_Location :
Charlotte, NC
DOI :
10.1109/APEC.2015.7104513