DocumentCode
708416
Title
Minimization of vias in PCB implementations of planar coils with litz-wire structure
Author
Lope, I. ; Acero, J. ; Serrano, J. ; Carretero, C. ; Alonso, R. ; Burdio, J.M.
Author_Institution
Dept. de Ing. Electron. y Comun., Univ. de Zaragoza, Zaragoza, Spain
fYear
2015
fDate
15-19 March 2015
Firstpage
2512
Lastpage
2517
Abstract
PCB implementation of planar windings replicates the structure of conventional litz wires in order to reduce the ac losses. This structure consists of a set of fine trace electrically connected in parallel which are transposed by means of changes of both trajectory and layer. An appropriate transposition strategy is essential to reduce the winding ac losses, however PCBs with high number of vias could result expensive and not reliable. Taking advantage of the field profile of planar windings, in this work is studied the minimization of the number of vias without significant reduction of performance. The work is carried out by means of a combination of finite-element analysis (FEA) simulations and experimental verification on ultra-thin (0.3 mm) PCB prototypes of planar inductors oriented to a domestic induction heating application.
Keywords
coils; finite element analysis; inductors; losses; printed circuits; prototypes; vias; windings; Litz-wire structure; PCB implementation; domestic induction heating application; finite-element analysis; planar coils; planar inductors; planar windings; ultrathin PCB prototypes; vias minimization; winding ac losses; Coils; Conductors; Couplings; Inductors; Magnetic fields; Windings; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference and Exposition (APEC), 2015 IEEE
Conference_Location
Charlotte, NC
Type
conf
DOI
10.1109/APEC.2015.7104703
Filename
7104703
Link To Document