DocumentCode
709292
Title
Transient electrical-thermal co-simulation in the design of on-chip and 3-D interconnects
Author
Tianjian Lu ; Jian-Ming Jin
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
fYear
2015
fDate
22-26 March 2015
Firstpage
1
Lastpage
2
Abstract
The electrical-thermal co-simulation in the transient regime is developed for the design of on-chip and 3-D interconnects. The co-simulation is based on the finite element method, of which the capability is further extended to efficiently handle large-scale problems by employing the finite element tearing and interconnecting (FETI) method and the FETI-enabled parallel computing.
Keywords
finite element analysis; integrated circuit interconnections; three-dimensional integrated circuits; 3-D interconnects; FETI-enabled parallel computing; finite element method; finite element tearing method; interconnecting method; on-chip interconnects; transient electrical-thermal co-simulation; Conductivity; Finite element analysis; Heating; Mathematical model; Parallel processing; System-on-chip; Transient analysis; Electrical-Thermal Co-Simulation; Finite Element Tearing and Interconnecting; On-Chip and 3-D Interconnects;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Computational Electromagnetics (ACES), 2015 31st International Review of Progress in
Conference_Location
Williamsburg, VA
Type
conf
Filename
7109620
Link To Document