Low/room temperature wafer bonding technologies for three-dimensional integration

Various low/room temperature bonding technologies will be reviewed in this talk. The mechanism of plasma activated bonding as well as a novel low/room temperature wafer bonding technology, using new surface preparation method, will be discussed. Covalent and conductive bonding processes at low temperatures and even room temperature may become key technologies in order to fabricate high performance junctions in compound semiconductor integration applications. The process qualification results using a new surface preparation on Si wafers will be shown. Apart from equipment characterization data, e.g. particle contamination, data presented here include HR-TEM, EDXS and bond strength analysis achieved for Si-Si hydrophobic wafer bonding.