• DocumentCode
    709870
  • Title

    Enhanced CDM-robustness for the packaged IC with the extra bonding wire to the die-attach plate

  • Author

    Tzu-Cheng Kao ; Jian-Hsing Lee ; Chen-Hsin Lien ; Chih-Hsien Wang ; Kuang-Cheng Tai ; Hung-Der Su

  • Author_Institution
    Inst. of Electron. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • fYear
    2015
  • fDate
    19-23 April 2015
  • Abstract
    From the experimental measurements, the dominant charge source for a packaged IC chip during a charged-device model (CDM) ESD event is the capacitor between the die-attach plate and the metal bus line, CSUB. By adding a bonding wire between the die-attach plate and the Vss pin, a parallel inductor to the CSUB can be created. The CDM-robustness for the packaged IC chip is significantly improved because of this parallel LC resonance circuit.
  • Keywords
    integrated circuit modelling; integrated circuit packaging; lead bonding; microassembling; CDM ESD event; IC packaging; capacitor; charge source; charged-device model; die-attach plate; enhanced CDM-robustness; extra bonding wire; metal bus line; parallel LC resonance circuit; Bonding; Capacitance; Discharges (electric); Integrated circuit modeling; RLC circuits; Wires; Charged device model (CDM); Electrostatic-discharge (ESD); Silicon on insulator (SOI);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium (IRPS), 2015 IEEE International
  • Conference_Location
    Monterey, CA
  • Type

    conf

  • DOI
    10.1109/IRPS.2015.7112797
  • Filename
    7112797
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=709870