Analysis of the SET and RESET states drift of phase-change memories by low frequency noise measurements

In this paper, we use low frequency noise (LFN) measurements to study the resistance drift of the low resistance (SET) and the high resistance (RESET) states Ge-rich based PCM devices. We confirm that the structural relaxation of the amorphous phase, which is at the origin of the drift of the RESET state, also results in an increase of the normalized noise. We then highlight for the first time the decrease of the normalized noise (S_I/I²) of the SET states obtained with different programming procedures, which originates from the structural relaxation of the amorphous-like grain boundaries (GB). This demonstrates the major electrostatic influence of the interfacial defects on the LFN of the SET states. The results are successfully interpreted in the framework of recently published models which give account for the drift of the SET and RESET states.