New LFN and RTN analysis methodology in 28 and 14nm FD-SOI MOSFETs

Author

Theodorou, Christoforos G. ; Ioannidis, Eleftherios G. ; Haendler, Sebastien ; Planes, Nicolas ; Josse, Emmanuel ; Dimitriadis, Charalabos A. ; Ghibaudo, Gerard

Author_Institution

LAHC, INPG, Grenoble, France

fYear

2015

fDate

19-23 April 2015

Abstract

A thorough investigation and statistical analysis of the low-frequency (LFN) and random telegraph noise (RTN) in 28 and 14nm FD-SOI CMOS transistors is presented, for the first time. It is shown that the 14nm technology node is improved in terms of threshold voltage fluctuations when compared to the 28nm one. A new analysis method that directly probes the RTN presence is also proposed. Finally, the LFN/RTN impact on the device dynamic variability is presented through CADENCE design suite circuit simulations.

Keywords

MOSFET; random noise; semiconductor device noise; silicon-on-insulator; statistical analysis; CADENCE design suite circuit simulations; FD-SOI CMOS transistors; FD-SOI MOSFETs; LFN analysis methodology; RTN analysis methodology; device dynamic variability; low-frequency noise; random telegraph noise; size 14 nm; size 28 nm; statistical analysis; threshold voltage fluctuations; CMOS integrated circuits; CMOS technology; Logic gates; Noise; Semiconductor device measurement; Standards; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium (IRPS), 2015 IEEE International

Conference_Location

Monterey, CA

Type

conf

DOI

10.1109/IRPS.2015.7112833

Filename

7112833