Title :
A 1 Mb/s–40 Mb/s human body channel communication transceiver
Author :
Ching-Che Chung ; Chi-Tung Chang ; Chih-Yu Lin
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
Abstract :
A high data rate, low-power, and large random jitter tolerance wideband signaling (WBS) transceiver for human body channel communication (BCC) is presented in this paper. Firstly, an investigation of human body channel characteristics from 1MHz to 80MHz is discussed. Then in the transmitter part, the proposed WBS transceiver uses a NRZI encoding scheme to transmit data. At the receiver part, a blind 7X oversampling clock and data recovery (CDR) circuit with the vote mechanism can effectively recover the data which distorted by the frequency drift and random noise from body antenna effects. The proposed WBS transceiver is implemented in a standard performance 90nm CMOS process, and the core area is 0.04 mm2. The supported data rate of the proposed WBS transceiver ranges from 1Mb/s to 40Mb/s. The power consumption is 1.94mW at 40Mb/s, and the bit energy is 0.0485 nJ/b.
Keywords :
CMOS integrated circuits; HF antennas; VHF antennas; biomedical communication; broadband antennas; clock and data recovery circuits; jitter; radio transceivers; random noise; telecommunication signalling; wearable antennas; wireless channels; BCC; CDR circuit; CMOS process; NRZI encoding scheme; WBS transceiver; bit rate 1 Mbit/s to 4 Mbit/s; blind 7X oversampling clock and data recovery circuit; body antenna effect; frequency drift; human body channel communication transceiver; power consumption; random jitter tolerance wideband signaling transceiver; random noise; size 90 nm; vote mechanism; Clocks; Frequency shift keying; Frequency-domain analysis; Jitter; Transceivers; Wireless communication;
Conference_Titel :
VLSI Design, Automation and Test (VLSI-DAT), 2015 International Symposium on
Conference_Location :
Hsinchu
DOI :
10.1109/VLSI-DAT.2015.7114536
