Title :
Special session: Hot topics: Statistical test methods
Author :
Barragan, Manuel J. ; Leger, Gildas ; Azais, Florence ; Blanton, R.D. ; Singh, Adit D. ; Sunter, Stephen
Author_Institution :
TIMA, CNRS-Univeristé Grenoble-Alpes, France
Abstract :
The process of testing Integrated Circuits involves a huge amount of data: electrical circuit measurements, information from wafer process monitors, spatial location of the dies, wafer lot numbers, etc. In addition, the relationships between faults, process variations and circuit performance are likely to be very complex and non-linear. Test (and its extension to diagnosis) should be considered as a challenging highly dimensional multivariate problem.
Keywords :
Circuit faults; Data mining; Integrated circuit modeling; Radio frequency; Testing; Timing;
Conference_Titel :
VLSI Test Symposium (VTS), 2015 IEEE 33rd
Conference_Location :
Napa, CA, USA
DOI :
10.1109/VTS.2015.7116265