• DocumentCode
    711030
  • Title

    STT-MRAM for low power systems

  • Author

    Endoh, Tetsuo

  • Author_Institution
    Center for Innovative Integrated Electron. Syst., Tohoku Univ., Sendai, Japan
  • fYear
    2015
  • fDate
    27-29 April 2015
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Recently in semiconductor memories, it is becoming difficult to meet the target performance requirements by technology development based solely on device scaling. Especially, due to the increase in memory capacity, increased operation speed and increased leakage current of MOSFET, the power consumption of LSI is rapidly increasing.
  • Keywords
    MOSFET; MRAM devices; large scale integration; leakage currents; low-power electronics; power consumption; scaling circuits; LSI; MOSFET; STT-MRAM; device scaling; large scale integration; leakage currents; low-power systems; operation speed; power consumption; semiconductor memory capacity; target performance requirements; Junctions; Magnetic tunneling; Magnetoelectronics; Memory management; Nonvolatile memory; Random access memory; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems and Application (VLSI-TSA), 2015 International Symposium on
  • Conference_Location
    Hsinchu
  • Type

    conf

  • DOI
    10.1109/VLSI-TSA.2015.7117581
  • Filename
    7117581
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=711030