• DocumentCode
    711350
  • Title

    Implementing a Software Defined Radio using the Maestro 49-tile processor

  • Author

    Loomis, Herschel ; Kragh, Frank ; Dinolt, George

  • Author_Institution
    Dept. of Electr. & Comput. Eng., U.S. Naval Postgrad. Sch., Monterey, CA, USA
  • fYear
    2015
  • fDate
    7-14 March 2015
  • Firstpage
    1
  • Lastpage
    14
  • Abstract
    The Maestro 49-tile Radiation-Hard-by-Design chip was developed to demonstrate the application of space-qualified, multicore hardware. We have investigated the implementation of a single precision floating-point pipeline FFT to be used as part of a Software Defined Radio (SDR) application. The details of the software architecture that can adapt to the use of different numbers of tiles and the performance of the N-point FFTs for N = 128, 512, 1024, and 2048 are described. The maximum throughput achieved for a 2048-point FFT is 27 million samples per second when 20 of the 49 available tiles are used for separate FFT blocks, one tile is used for input data distribution, and one tile is used for output data collection. We also report on the performance of the SDR based upon the FFT experiments.
  • Keywords
    fast Fourier transforms; floating point arithmetic; microprocessor chips; pipeline arithmetic; radiation hardening (electronics); software radio; space vehicle electronics; Maestro 49-tile processor; maximum throughput; multicore hardware; radiation-hard-by-design chip; single precision floating point pipeline FFT; software defined radio; space qualified processor; Biographies; Cyclotrons; Indexes; Tunneling magnetoresistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Aerospace Conference, 2015 IEEE
  • Conference_Location
    Big Sky, MT
  • Print_ISBN
    978-1-4799-5379-0
  • Type

    conf

  • DOI
    10.1109/AERO.2015.7119153
  • Filename
    7119153