DocumentCode
711691
Title
High performance two-stage bootstrapped GaAs comparator with gain enhancement
Author
Di Lan ; Yilu Ning ; Jing Wang ; Hao Jiang
Author_Institution
Dept. of Electr. Eng., Univ. of South Florida, Tampa, FL, USA
fYear
2015
fDate
13-15 April 2015
Firstpage
1
Lastpage
4
Abstract
A high performance GaAs pHEMT comparator using a double cascode self-bootstrapping configuration with gain enhancement is proposed and investigated in this paper. An improved active load using D-mode HEMT devices is discussed so that the differential-mode input can be further reduced. Fully differential input pair can be realized by either E or D mode FETs. The comparator operates with a single power supply and generates a single output with a buffer stage for driving a large load or subsequent stages. With newly designed comparator, not only small propagation delay of 339 psec, but also high output voltage swing 1.5 V have been demonstrated. Analysis of the adapted comparator circuit and optimization of all transistor sizes for its best performance is also presented in detail. The overall performance is on par with prior attempts.
Keywords
HEMT integrated circuits; III-V semiconductors; bootstrap circuits; buffer circuits; comparators (circuits); gallium arsenide; optimisation; D-mode HEMT devices; GaAs; GaAs pHEMT comparator; active load; buffer stage; comparator circuit; differential-mode input; double cascode self-bootstrapping configuration; gain enhancement; time 339 ps; two-stage bootstrapped GaAs comparator; voltage 1.5 V; Integrated circuits; Layout; MESFETs; PHEMTs; Propagation delay; E/D HEMT; GaAs comparator; gain enhancement; self-bootstrapping;
fLanguage
English
Publisher
ieee
Conference_Titel
Wireless and Microwave Technology Conference (WAMICON), 2015 IEEE 16th Annual
Conference_Location
Cocoa Beach, FL
Type
conf
DOI
10.1109/WAMICON.2015.7120379
Filename
7120379
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