DocumentCode
713443
Title
The DC behavioural electrothermal model of silicon carbide power MOSFETs under SPICE
Author
Lakrim, Abderrazak ; Tahri, Driss
Author_Institution
Fac. of Sci. & Technol., Signals, Syst. & Components Lab., Univ. Sidi Mohamed Ben Abdellah, Fez, Morocco
fYear
2015
fDate
17-19 March 2015
Firstpage
2818
Lastpage
2823
Abstract
This paper presents a new behavioural electrothermal model of power Silicon Carbide (SiC) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) under SPICE. This model is based on the MOSFET model level 1of SPICE, in which phenomena such as Drain Leakage Current IDSS, On-State Resistance RDSon, gate Threshold voltage VGSth, the transconductance (gfs), I-V Characteristics Body diode, temperature-dependent and self-heating are included and represented using behavioural blocks ABM (Analog Behavioural Models) of Spice library. This ultimately makes this model flexible and easily can be integrated into the various Spice-based simulation softwares. The internal junction temperature of the component is calculated on the basis of the thermal model through the electric power dissipated inside and its thermal impedance in the form of the localized Foster canonical network. The model parameters are extracted from manufacturers´ data (curves data sheets) using polynomial interpolation with the method of simulated annealing (S A) and weighted least squares (WLS). This model takes into account the various important phenomena within transistor. The effectiveness of the presented model has been verified by Spice simulation results and as well as by data measurement for SiC MOSFET transistor C2M0025120D CREE (1200V, 90A).
Keywords
interpolation; leakage currents; least squares approximations; power MOSFET; semiconductor device models; silicon compounds; simulated annealing; C2M0025120D CREE; I-V characteristics body diode; SPICE; SiC; SiC MOSFET transistor; WLS; analog behavioural models; behavioural blocks ABM; behavioural electrothermal model; current 90 A; drain leakage current; electric power; gate threshold voltage; internal junction temperature; localized Foster canonical network; on-state resistance; polynomial interpolation; power SiC metal oxide semiconductor field effect transistor; power silicon carbide MOSFET; self-heating; simulated annealing; thermal impedance; transconductance; voltage 1200 V; weighted least squares; Data models; Integrated circuit modeling; MOSFET; Mathematical model; Semiconductor device modeling; Silicon carbide; Temperature; ABM Spice library; Behavioural Model; C2M0025120D CREE; DC Electro-thermal Model; SPICE Modelling; SiC power MOSFET;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Technology (ICIT), 2015 IEEE International Conference on
Conference_Location
Seville
Type
conf
DOI
10.1109/ICIT.2015.7125514
Filename
7125514
Link To Document