Title :
A self-healing technique using ZTC biasing for PVT variations compensation in 65nm CMOS technology
Author :
Nateghi, Hamidreza ; El-Sankary, Kamal
Author_Institution :
Dept. of Electr. & Comput. Eng., Dalhousie Univ., Halifax, NS, Canada
Abstract :
This paper presents a self-healing technique for current sources to compensate process, supply voltage and temperature variations in 65nm CMOS technology. The proposed circuit utilizes transistor Self-Heating in order to bias current source MOSFET in the vicinity of Zero Temperature Coefficient (ZTC). The ZTC point existence in 65nm scale has been proven to exist below the nominal voltage supply. A circuit level modeling of the effect of self-heating and current change with temperature is proposed in this work to allow the simulation of the circuit using transient analysis in Spectre simulator environment. The effectiveness of the self-healed current source is tested in two common analog and digital applications. Simulation results show significant PVT compensation and improvement in circuit performance.
Keywords :
CMOS integrated circuits; MOSFET; CMOS technology; PVT variations compensation; ZTC biasing; bias current source MOSFET; circuit level modeling; circuit performance improvement; common analog applications; current change; digital applications; nominal voltage supply; self-healing technique; size 65 nm; temperature variations; transient analysis; zero temperature coefficient; CMOS integrated circuits; Integrated circuit modeling; MOSFET; Mathematical model; Simulation; Temperature sensors; Closed-Loop Self-Healing; Process Degeneration; Self-Heating; Temperature Compensation; Voltage Compensation; Zero Temperature Coefficient;
Conference_Titel :
Electrical and Computer Engineering (CCECE), 2015 IEEE 28th Canadian Conference on
Conference_Location :
Halifax, NS
Print_ISBN :
978-1-4799-5827-6
DOI :
10.1109/CCECE.2015.7129173
