A self-healing technique using ZTC biasing for PVT variations compensation in 65nm CMOS technology

This paper presents a self-healing technique for current sources to compensate process, supply voltage and temperature variations in 65nm CMOS technology. The proposed circuit utilizes transistor Self-Heating in order to bias current source MOSFET in the vicinity of Zero Temperature Coefficient (ZTC). The ZTC point existence in 65nm scale has been proven to exist below the nominal voltage supply. A circuit level modeling of the effect of self-heating and current change with temperature is proposed in this work to allow the simulation of the circuit using transient analysis in Spectre simulator environment. The effectiveness of the self-healed current source is tested in two common analog and digital applications. Simulation results show significant PVT compensation and improvement in circuit performance.