DocumentCode :
714396
Title :
Analysis of advanced programming architectures for next-generation Flash memories
Author :
Ashrafi, Reza A. ; Pusane, Ali E. ; Demirkan, Ismail
Author_Institution :
Dept. of Electr. & Electron. Eng., Bogazici Univ., Istanbul, Turkey
fYear :
2015
fDate :
16-19 May 2015
Firstpage :
644
Lastpage :
644
Abstract :
In this paper, we study the error performance of programming architectures for Flash memories. Specifically, we propose an advanced programming architecture and evaluate its performance via computer simulations. We show that the proposed method can improve the error performance under severe interfering effects, which is the case for the next-generation Flash memories with very small cells employing multiple levels.
Keywords :
flash memories; programming; software performance evaluation; advanced programming architecture analysis; computer simulations; next-generation flash memories; performance evaluation; Bit error rate; Computer architecture; Computer simulation; Flash memories; Interference; Next generation networking; Programming; ICI mitigation; NAND Flash memory; programming architectures;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing and Communications Applications Conference (SIU), 2015 23th
Conference_Location :
Malatya
Type :
conf
DOI :
10.1109/SIU.2015.7129906
Filename :
7129906
Link To Document :
بازگشت