DocumentCode
719539
Title
Integration and Electrical Evaluation of Epitaxially Grown Si and SiGe Channels for Vertical NAND Memory Applications
Author
Capogreco, Elena ; Degraeve, Robin ; Lisoni, Judit Gloria ; Luong, Vu ; Arreghini, Antonio ; Toledano-Luque, Maria ; Hikavyy, Andriy ; Numata, Toshinori ; De Meyer, Kristin ; Van den bosch, Geert ; Van Houdt, Jan
Author_Institution
Imec, Leuven, Belgium
fYear
2015
fDate
17-20 May 2015
Firstpage
1
Lastpage
4
Abstract
Epitaxially grown Si and Si0.6Ge0.4 are integrated as replacement of poly-Si channel in vertical cylindrical transistors for vertical NAND memory application, in order to investigate the impact of the grain boundaries on current conduction. Epi-Si outperforms both poly-Si and Epi-SiGe channels, resulting in the best conduction, with large improvement on both sub threshold swing and transconductance (gm). The experimentally observed gm bimodal distribution for epi Si is corroborated and explained through a resistive network model: lower gm conduction occurs when current needs to cross a high resistance boundary, whereas higher gm is obtained when this boundary is not present.
Keywords
Ge-Si alloys; NAND circuits; elemental semiconductors; epitaxial growth; grain boundaries; semiconductor growth; silicon; storage management chips; Si; Si0.6Ge0.4; current conduction; electrical evaluation; epitaxial growth; grain boundaries; high resistance boundary; lower gm conduction; observed gm bimodal distribution; polycrystalline silicon channel; resistive network model; subthreshold swing; transconductance; vertical NAND memory; vertical cylindrical transistors; Epitaxial growth; Flash memories; Grain boundaries; Junctions; Logic gates; Silicon; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Workshop (IMW), 2015 IEEE International
Conference_Location
Monterey, CA
Print_ISBN
978-1-4673-6931-2
Type
conf
DOI
10.1109/IMW.2015.7150291
Filename
7150291
Link To Document