• DocumentCode
    719671
  • Title

    Arguing formally about flight control laws

  • Author

    Jeppu, Natasha Y. ; Jeppu, Yogananda ; Murthy, Nagaraj

  • Author_Institution
    Comput. Eng., Nat. Inst. of Technol. Karnataka, Mangalore, India
  • fYear
    2015
  • fDate
    28-30 May 2015
  • Firstpage
    378
  • Lastpage
    383
  • Abstract
    Flight control law software have errors. Some are found during the extensive testing and certification process and others pass through causing accidents. The testing of flight control software indicates that the code and the model match. But it is very difficult to ensure if the model was correct in the first place. Model checkers like Mathworks Simulink Design Verifier check the models against formally defined conditions and system behavior. The tool can come up with counterexamples that can fail an assertion or proof. A study is done on how easy or difficult it is to teach engineering students this formal process. The problem statement, the Simulink models and the outcome of the study in terms of advantages and disadvantages of using Simulink Design Verifier is highlighted in this preliminary study.
  • Keywords
    aerospace computing; aerospace control; control engineering computing; formal verification; program testing; Mathworks Simulink Design Verifier; flight control law software; model checkers; software certification process; software testing process; Aerospace control; Delays; MATLAB; Mathematical model; Testing; Embedded software; Formal verification; MATLAB; Model checking; Software tools;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Industrial Instrumentation and Control (ICIC), 2015 International Conference on
  • Conference_Location
    Pune
  • Type

    conf

  • DOI
    10.1109/IIC.2015.7150771
  • Filename
    7150771