• DocumentCode
    720771
  • Title

    K=0.266 immersion lithography patterning and its challenge for NAND FLASH

  • Author

    Huayong Hu ; Weiming He ; Gaorong Li ; Nannan Zhang ; Liwan Yue ; Ye Lei ; Jinhua Pei ; Qiang Wu

  • Author_Institution
    Technol. R&D, Semicond. Manuf. Int. Corp., Shanghai, China
  • fYear
    2015
  • fDate
    15-16 March 2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In immersion lithography, a single exposure resolution of 36.5 nm half pitch (k = 0.255) has been demonstrated with a numerical aperture of 1.35. However the practical resolution limit in production will be closer to 40 nm half pitch (k = 0.28), without involving double patterning alike strategies, such as self-aligned double patterning (SADP). While for the practical resolution limit with k value less than 0.28 in NAND-Flash production, single exposure solution has been adopted though it can create some significant challenge. In this paper, we will present an experimental study of the resolution limit with k value pushed to 0.266 on an ASML TWINSCAN NXT: 1950i. Compared to what we do before, big fidelity degradation was observed at K1=0.266, presenting as worse linewidth roughness (LWR). To improve the LWR, we studied the effect of BARC thickness based on Foot Exposure simulation as well as different illumination condition. The process window on the production mask will be demonstrated. And finally we will also show a comparison in the final after etch inspection (AEI) linewidth performance between single exposure and SADP.
  • Keywords
    NAND circuits; flash memories; immersion lithography; inspection; masks; AEI; ASML TWINS CAN NXT 1950i; BARC thickness; LWR; NAND flash; SADP; after etch inspection; bottom antireflection coating; exposure resolution; fidelity degradation; foot exposure simulation; illumination condition; immersion lithography patterning; linewidth roughness; numerical aperture; production mask; self-aligned double patterning; Flash memories; Logic gates; Silicon; Software; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Technology International Conference (CSTIC), 2015 China
  • Conference_Location
    Shanghai
  • ISSN
    2158-2297
  • Type

    conf

  • DOI
    10.1109/CSTIC.2015.7153360
  • Filename
    7153360