Title :
Hardware-Based Performance Enhancement Guaranteed Caches
Author :
Yijie Huangfu ; Wei Zhang
Author_Institution :
Dept. of Electr. & Comput. Eng., Virginia Commonwealth Univ., Richmond, VA, USA
Abstract :
Cache memories are widely used in microprocessors to improve the average-case memory performance. However, they are harmful to time predictability, and thus may not be desirable for real-time systems. In this paper, we make simple hardware extensions of a regular cache to implement the performance enhancement guaranteed cache (PEG-C). The PEG-C is totally controlled by hardware, which can automatically improve the average-case performance of real-time software with guaranteed and enhanced worst-case performance.
Keywords :
cache storage; microprocessor chips; PEG-C; average-case memory performance; cache memories; hardware-based performance enhancement guaranteed caches; microprocessors; real-time software systems; time predictability; Benchmark testing; Computer architecture; Hardware; Real-time systems; Registers; Runtime; Timing;
Conference_Titel :
Real-Time Distributed Computing (ISORC), 2015 IEEE 18th International Symposium on
Conference_Location :
Auckland
DOI :
10.1109/ISORC.2015.11
