CMOS circuits and nanodevices for spike based neural computing

This paper describes hardware implementation of two integrate-and-fire type neuron models for spike based computing: pulse-coupled phase oscillator networks and spiking neural networks. A coupled Markov random field model for image region segmentation can be implemented using a pulse-coupled phase oscillator network. Multiply-and-accumulation calculation can be performed using rise timing of responses in an integrate-and-fire type spiking neuron model. Both oscillator and neuron models can be implemented by CMOS circuits consisting of capacitors with current sources or resistors. For constructing large-scale networks, nanodisk array structures are used for realizing high resistance.