• DocumentCode
    723078
  • Title

    Alternative fine pitch solution of low cost and high throughput thermal compression bonding by using capillary underfill

  • Author

    Tsai, Mike ; Lan, Albert ; Yan Han Yao ; Meng Yueh Wu ; Cheng Kai Chang ; Lo, Roger ; Chen, Eason

  • Author_Institution
    Siliconware Precision Ind. Co. Ltd., Taichung, Taiwan
  • fYear
    2015
  • fDate
    26-29 May 2015
  • Firstpage
    465
  • Lastpage
    469
  • Abstract
    During last couple years, Flip Chip package form factor provide the ideal solution for high I/O and better electrical performance on handheld/networking market which included high frequency and high speed product characterization. With developing the fine pitch in chip attach process, there is a methodology called thermal compression bonding combining with capillary underfill (TCB+UF) technology, which is comibined between traditional mass reflow (MR) and thermal compression bonding with non-conductive paste (TCBNCP) [1][2]. Besides, process operation cylce time could be reduced since unit per hour throughput increase while applying underfill. A Flip Chip Ball Grid Array (FCBGA) with large die size, fine pitch Cu pillar bump, and the organic laminated substrate with bump on trace (BOT) was used as test vehicle for this study. Different flux transfer methodologies were also applied into DOE study to approach high throughput UPH and reduce process cycle time. The characterization analysis will utilize simulation methodology & typical reliability testing (Temperature Cycle Test, unbias HAST and High Temperature Storage Test) condition as a quality judgment metrology for TCB+UF process evaluation. Finally, this paper will find out the suitable TCB+UF of key process feasibility data for future fine pitch product application.
  • Keywords
    ball grid arrays; bonding processes; copper; design of experiments; flip-chip devices; reliability; BOT; Cu; DOE study; FCBGA; TCB+UF technology; TCBNCP; bump on trace; capillary underfill; chip attach process; fine pitch Cu pillar bump; flip chip ball grid array; flip chip package form factor; flux transfer methodologies; future fine pitch product application; handheld-networking market; high temperature storage test; high throughput UPH; mass reflow; non-conductive paste; organic laminated substrate; process cycle time; process operation cycle time; quality judgment metrology; reliability testing condition; temperature cycle test; thermal compression bonding; unbias HAST; Bonding; Electronic components; Flip-chip devices; Reliability; Soldering; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
  • Conference_Location
    San Diego, CA
  • Type

    conf

  • DOI
    10.1109/ECTC.2015.7159632
  • Filename
    7159632